Login or register (free and only takes a few minutes) to participate in this question.
You will also have access to many other tools and opportunities designed for those who have language-related jobs (or are passionate about them). Participation is free and the site has a strict confidentiality policy.
English to German translations [PRO] Tech/Engineering - Computers: Hardware / PCI
English term or phrase:siehe Satz
"PCIE Config Read/Write Test - This test verifies that a graphics device can handle system (CPU) generated non-posted configuration read/write transactions as a completer"
Äh... hier verstehe ich jetzt wirklich nur noch Bahnhof... oder so.
Was sind "non-posted configuration read/write transactions", was ist ein "completer"?
W
Explanation: To mitigate the penalty of the request-completion latency, messages and some write transactions in PCI Express are posted, meaning the write request (including data) is sent, and the transaction is over from the requester's perspective as soon as the request is sent out of the egress port; responsibility for delivery is now the problem of the next device. In a multi-level topology, this has the advantage of being much faster than waiting for the entire request-completion transit, but — as in all posting schemes — uncertainty exists concerning when (and if) the transaction completed successfully at the ultimate recipient.
In PCI Express, write posting to memory is considered acceptable in exchange for the higher performance. On the other hand, writes to IO and configuration space may change device behavior, and write posting is not permitted. A completion will always be sent to report status of the IO or configuration write operation.
Also, "posted" ist, wann und wenn "the request is sent out of the egress port".
"Non-posted" muss demnach solche "transaction requests", die eben vom System erzeugt und nicht ueber eGress-Port gegangen sind.
Wenn die Grafikkarte den Test besteht, ist sie in der Lage, non-posted config reads & writes von der CPU mit Cpl oder CplD zu beantworten und dadurch zu "completen". Der Link von Wenjer erklrt das wirklich gut.
10:17 Jul 13, 2004
Automatic update in 00:
Answers
16 mins confidence:
siehe satz
s.u.
Explanation: To mitigate the penalty of the request-completion latency, messages and some write transactions in PCI Express are posted, meaning the write request (including data) is sent, and the transaction is over from the requester's perspective as soon as the request is sent out of the egress port; responsibility for delivery is now the problem of the next device. In a multi-level topology, this has the advantage of being much faster than waiting for the entire request-completion transit, but — as in all posting schemes — uncertainty exists concerning when (and if) the transaction completed successfully at the ultimate recipient.
In PCI Express, write posting to memory is considered acceptable in exchange for the higher performance. On the other hand, writes to IO and configuration space may change device behavior, and write posting is not permitted. A completion will always be sent to report status of the IO or configuration write operation.
Also, "posted" ist, wann und wenn "the request is sent out of the egress port".
"Non-posted" muss demnach solche "transaction requests", die eben vom System erzeugt und nicht ueber eGress-Port gegangen sind.
Wenjer Leuschel Taiwan Local time: 18:38 Native speaker of: Chinese PRO pts in category: 4
The translation workplace 
