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English to Spanish translations [PRO]
Tech/Engineering - Computers (general) | | English term or phrase: oxide and back-end stack options | Various TR, oxide and back-end stack options for customers' products and low-cost version of LP process
gracias |
| | | (diversas opciones de) óxidos (o compuertas) y apilados de interconexión | Explanation:
Esos conceptos se mencionan en esta página de Samsung, que describe una tecnología utilizada para fabricar chips ASIC :
• Various TR, oxide and backend stack options, plus low-power version of LP process
• L4LP
- 3 SG TR variants (HVT, RVT, LVT)
- 2 Oxide variants (SG, DG)
(Samsung, ASIC, http://www.samsung.com/global/business/semiconductor/product...
Vayamos por partes:
Oxide
El "óxido" se refiere al material aislante de las compuertas (generalmente dióxido de silicio). En este caso ofrecen las variantes "SG = single gate" y "DG = double gate", de modo que llamarlos "opciones de óxidos" no suena del todo correcto, por lo que también sugiero "compuertas".
Back-end
Es la etapa de la fabricación en la que se interconectan los circuitos:
• Metal layers – Once the various semiconductor devices have been created they must be interconnected to form the desired electrical circuits. This "back end of line" (BEOL – the latter portion of the wafer fabrication, not to be confused with "back end" of chip fabrication which refers to the package and test stages) involves creating metal interconnecting wires that are isolated by insulating dielectrics. (http://en.wikipedia.org/wiki/Semiconductor_device_fabricatio... )
Stack
Se refiere a que los circuitos se pueden fabricar apilados unos sobre otros, para ahorrar espacio:
• Memory stacking options for smaller footprints (Samsung, mobile SoC, http://www.samsung.com/global/business/semiconductor/product... )
• to make a thinner stack of multiple dies (Samsung, Stacking Process for DRAM, http://www.samsung.com/us/news/newsRead.do?news_seq=3686&pag... )
En la página 16 de http://www.samsung.com/us/aboutsamsung/ir/ireventpresentatio... hay una foto de 32 chips apilados.
Combinando todos los conceptos anteriores, resulta mi sugerencia.
Saludos,
Daniel
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| Selected response from:
  Daniel Grau
| Grading comment gracias
4 KudoZ points were awarded for this answer |
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| Discussion entries: 0 |
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Automatic update in 00:
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23 hrs confidence:   (diversas opciones de) óxidos (o compuertas) y apilados de interconexión
Explanation:
Esos conceptos se mencionan en esta página de Samsung, que describe una tecnología utilizada para fabricar chips ASIC :
• Various TR, oxide and backend stack options, plus low-power version of LP process
• L4LP
- 3 SG TR variants (HVT, RVT, LVT)
- 2 Oxide variants (SG, DG)
(Samsung, ASIC, http://www.samsung.com/global/business/semiconductor/product...
Vayamos por partes:
Oxide
El "óxido" se refiere al material aislante de las compuertas (generalmente dióxido de silicio). En este caso ofrecen las variantes "SG = single gate" y "DG = double gate", de modo que llamarlos "opciones de óxidos" no suena del todo correcto, por lo que también sugiero "compuertas".
Back-end
Es la etapa de la fabricación en la que se interconectan los circuitos:
• Metal layers – Once the various semiconductor devices have been created they must be interconnected to form the desired electrical circuits. This "back end of line" (BEOL – the latter portion of the wafer fabrication, not to be confused with "back end" of chip fabrication which refers to the package and test stages) involves creating metal interconnecting wires that are isolated by insulating dielectrics. (http://en.wikipedia.org/wiki/Semiconductor_device_fabricatio... )
Stack
Se refiere a que los circuitos se pueden fabricar apilados unos sobre otros, para ahorrar espacio:
• Memory stacking options for smaller footprints (Samsung, mobile SoC, http://www.samsung.com/global/business/semiconductor/product... )
• to make a thinner stack of multiple dies (Samsung, Stacking Process for DRAM, http://www.samsung.com/us/news/newsRead.do?news_seq=3686&pag... )
En la página 16 de http://www.samsung.com/us/aboutsamsung/ir/ireventpresentatio... hay una foto de 32 chips apilados.
Combinando todos los conceptos anteriores, resulta mi sugerencia.
Saludos,
Daniel
| Daniel Grau
Works in field
Native speaker of:  Spanish
PRO pts in category: 47
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| Changes made by editors |
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| Aug 28, 2009 - Changes made by Daniel Grau: | | Edited KOG entry | Sofia Ortega's old entry - "oxide and back-end stack options" => "(diversas opciones de) óxidos (o compuertas) y apilados de interconexión" |
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