Italian: per completare un accesso in memoria centraleEnglish translation: performing main memory access operations 
KudoZ The KudoZ network provides a framework for translators ... More  |
|
| GLOSSARY ENTRY (DERIVED FROM QUESTION BELOW) | | Italian term or phrase: | per completare un accesso in memoria centrale | | English translation: | performing main memory access operations | | Entered by: | David Russi |
| Options:
- Contribute to this entry |
Italian to English translations [PRO]
Tech/Engineering - Computers: Systems, Networks | | Italian term or phrase: per completare un accesso in memoria centrale | per completare un accesso in memoria centrale (o, peggio, in memoria secondaria) possono invece essere richiesti molti cicli di clock
access or fetch or time to quit?
Thanks! |
| | | performing main memory access operations | Explanation:
Or "complete main memory access operations"
18-548/15-548 Homework 2
... X axis is number of total clock cycles to access main memory. Plot points
for every 3 clock cycles on a linear scale up to 48 clocks. ...
www.ece.cmu.edu/~ece548/hw/hw2/ - 7k - Cached - Similar pages
Tutorial 1
... Minimum time required to access main memory, 4 clock cycles. System
clock, 16 MHz. Main memory wait states, 4. Cache memory wait states,
0. ...
wheelie.tees.ac.uk/users/a.clements/CacheQ1.htm - 17k - Cached - Similar pages
[PDF] Agileware Architecture for the Nimble Compiler
File Format: PDF/Adobe Acrobat - View as HTML
... in advance of their execution. It normally requires several clock
cycles to access main memory. As in conventional RISC processors ...
www.atl.external.lmco.com/overview/papers/959-9905.pdf - Similar pages
2. Memory Hierarchy Architecture
... clock cycles, a page fault costs 700,000-6,000,000 clock cycles [7, Section ... hardware
and software, to physical addresses, which are used to access main memory. ...
www.acm.org/jea/ARTICLES/Vol4Nbr3/node2.html - 16k - Cached - Similar pages
[PDF] Microsoft PowerPoint - ch7.3
File Format: PDF/Adobe Acrobat - View as HTML
... for L1 – Access L2 - access time 20 ns – 20 ns / 2 ns per clock cycle = 10 clock
cycles • Miss penalty for L2 – Access main memory - access time 100 ns ...
www.cs.pitt.edu/~childers/CS1541/lectures/ch7.3.pdf - Similar pages
[PS] 1 Quiz #1 F96 1 / 2 3 / 9 7
File Format: Adobe PostScript - View as Text
... Detective" [7 points] 1. For one uniprocessor system, the time to access main memory
is 200 ... 1 CPU clock cycle Hits to L2 take 3 CPU clock cycles(Assume that ...
www.cs.berkeley.edu/~kubitron/courses/ cs252-F98/quizzes/quiz1-F96.ps - Similar pages |
| Selected response from:
David Russi
United States
| Note from asker to answerer| 4 KudoZ points were awarded for this answer |
|
6 mins confidence:   peer agreement (net): +1 |
| performing main memory access operations
Explanation:
Or "complete main memory access operations"
18-548/15-548 Homework 2
... X axis is number of total clock cycles to access main memory. Plot points
for every 3 clock cycles on a linear scale up to 48 clocks. ...
www.ece.cmu.edu/~ece548/hw/hw2/ - 7k - Cached - Similar pages
Tutorial 1
... Minimum time required to access main memory, 4 clock cycles. System
clock, 16 MHz. Main memory wait states, 4. Cache memory wait states,
0. ...
wheelie.tees.ac.uk/users/a.clements/CacheQ1.htm - 17k - Cached - Similar pages
[PDF] Agileware Architecture for the Nimble Compiler
File Format: PDF/Adobe Acrobat - View as HTML
... in advance of their execution. It normally requires several clock
cycles to access main memory. As in conventional RISC processors ...
www.atl.external.lmco.com/overview/papers/959-9905.pdf - Similar pages
2. Memory Hierarchy Architecture
... clock cycles, a page fault costs 700,000-6,000,000 clock cycles [7, Section ... hardware
and software, to physical addresses, which are used to access main memory. ...
www.acm.org/jea/ARTICLES/Vol4Nbr3/node2.html - 16k - Cached - Similar pages
[PDF] Microsoft PowerPoint - ch7.3
File Format: PDF/Adobe Acrobat - View as HTML
... for L1 – Access L2 - access time 20 ns – 20 ns / 2 ns per clock cycle = 10 clock
cycles • Miss penalty for L2 – Access main memory - access time 100 ns ...
www.cs.pitt.edu/~childers/CS1541/lectures/ch7.3.pdf - Similar pages
[PS] 1 Quiz #1 F96 1 / 2 3 / 9 7
File Format: Adobe PostScript - View as Text
... Detective" [7 points] 1. For one uniprocessor system, the time to access main memory
is 200 ... 1 CPU clock cycle Hits to L2 take 3 CPU clock cycles(Assume that ...
www.cs.berkeley.edu/~kubitron/courses/ cs252-F98/quizzes/quiz1-F96.ps - Similar pages
| David Russi
United States
Specializes in field
Native speaker of:  English, Spanish
PRO pts in category: 6
|
|
| | Login to enter a peer comment (or grade) |
Return to KudoZ list
| |
The translation workplace 
