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Flanken des Speichertaktes

English translation: edges of the memory clock

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GLOSSARY ENTRY (DERIVED FROM QUESTION BELOW)
German term or phrase:Flanken des Speichertaktes
English translation:edges of the memory clock
Entered by: Daniela Schlöder
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22:40 Nov 25, 2001
German to English translations [PRO]
Tech/Engineering
German term or phrase: Flanken des Speichertaktes
A text about RAMs:

DDR-SDRAMs nutzen, im Gegensatz zu SDRAMs, beide Flanken des Speichertaktes.

Please help :-)
Daniela Schlöder
Germany
Local time: 18:51
edges of the memory clock
Explanation:
Sabine essentially has it right, but the usual formulation is 'edges of the (memory) clock

typical examples:
ref 1 :
By transferring twice as much data per clock (once on the rising edge and once on the falling edge), DDR SDRAM effectively offers twice as much memory bandwidth as an “equivalently clocked” Single Data Rate SDRAM solution.

ref 2:
DDR technology allows an output on both the rising and falling edges of the clock, and addresses and control signals are registered at every positive clock edge. Designed to transfer two data words per clock cycle at the I/O pins, DDR SDRAM uses the DDR architecture to obtain high-speed operations.
Selected response from:

Ken Cox
Local time: 18:51
Grading comment
Thank you so much!
4 KudoZ points were awarded for this answer

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Summary of answers provided
5edges of the memory clockKen Cox
5edge of storage cycle
Hans-Henning Judek
4memory clock edge
Translations4IT


  

Answers


29 mins   confidence: Answerer confidence 4/5Answerer confidence 4/5
memory clock edge


Explanation:
Not sure if this will help you much...but have a look

Takt- pref COMP clock

Speicher - memory

Flanke f ELEKTRON, PHYS des Stromstoßes edge



    Routledge
Translations4IT
Local time: 23:21
Native speaker of: Native in GermanGerman, Native in EnglishEnglish
PRO pts in pair: 730
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34 mins   confidence: Answerer confidence 5/5
edge of storage cycle


Explanation:
Speichertakt in this context describes the process of memory access, which is "storage"

HTH


    Reference: http://www.tecnologix.net
Hans-Henning Judek
Local time: 02:51
Native speaker of: Native in GermanGerman
PRO pts in pair: 893
Login to enter a peer comment (or grade)

2 hrs   confidence: Answerer confidence 5/5
edges of the memory clock


Explanation:
Sabine essentially has it right, but the usual formulation is 'edges of the (memory) clock

typical examples:
ref 1 :
By transferring twice as much data per clock (once on the rising edge and once on the falling edge), DDR SDRAM effectively offers twice as much memory bandwidth as an “equivalently clocked” Single Data Rate SDRAM solution.

ref 2:
DDR technology allows an output on both the rising and falling edges of the clock, and addresses and control signals are registered at every positive clock edge. Designed to transfer two data words per clock cycle at the I/O pins, DDR SDRAM uses the DDR architecture to obtain high-speed operations.



    Reference: http://www.anandtech.com/showdoc.html?i=1344&p=2
    Reference: http://www.altera.com/products/devices/apex/apx-dram.html
Ken Cox
Local time: 18:51
Native speaker of: Native in EnglishEnglish
PRO pts in pair: 5905
Grading comment
Thank you so much!
Login to enter a peer comment (or grade)




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