English to Italian Tech/Engineering IT (Information Technology)

The PB (Perimeter Bump or Bond) series of test die is designed to simulate the I/O of CMOS-like devices at various pad pitches. These test vehicles form the basis of a useful die standard for the evaluation of flip chip applications as a function of various bump, materials, or assembly variables. A limited subset of PB series die have been designed for wire bond evaluations. See "options available" for availability of wire bond compatible die.

The PB4 test chip is designed with I/O pads on 4 mil (102 micron) pitch located on the peripheral of the die. The 0.2-inch by 0.2-inch PB4 die contains 176 pads giving 88 daisy chain pairs.