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PNP sortie a collecteur ouvert

English translation: PNP open-collector output

02:46 Sep 20, 2000
French to English translations [PRO]
Tech/Engineering
French term or phrase: PNP sortie a collecteur ouvert
Exemple de raccordement d'un codeur incremental avec sorties PNP a collecteur ouvert.

Does this mean PNP outputs being connected to the open collector or is the term PNP open collector outputs?
Cain Godfrey
English translation:PNP open-collector output
Explanation:
I have found several sites where this expression is used.
Here's an example:

Description
The SN751508 and SN751518 are monolithic integrated circuits designed to drive the data lines of a dc plasma panel display. The SN751518 pin sequence is reversed from the SN751508 for ease in printed-circuit-board layout.
Each device consists of two 16-bit shift registers, 32 latches, 32 OR gates, and 32 pnp open-
collector output AND gates. Typically, a 32-bit data string is split into two 16-bit data strings externally and then entered in parallel into the shift registers on the high-to-low transition of the clock signal. A high LATCH ENABLE transfers the data from the shift registers to the inputs of 32 OR gates through the latches. Data present in the latch during the high-to-low transition of LATCH ENABLE is stored. When STROBE is high, the latch is masked and a high is placed on the data input of the output AND gates. When STROBE is low and SUSTAIN is high, data from the latches is reflected at the outputs. When low, SUSTAIN forces all outputs to their off state. Drivers can be cascaded via the serial data outputs of the static shift registers. These outputs are not affected by LATCH ENABLE, STROBE, or SUSTAIN.


Selected response from:

Laura Gentili
Italy
Local time: 02:57
Grading comment
4 KudoZ points were awarded for this answer



Summary of answers provided
na +1PNP open-collector output
Laura Gentili


  

Answers


1 hr peer agreement (net): +1
PNP open-collector output


Explanation:
I have found several sites where this expression is used.
Here's an example:

Description
The SN751508 and SN751518 are monolithic integrated circuits designed to drive the data lines of a dc plasma panel display. The SN751518 pin sequence is reversed from the SN751508 for ease in printed-circuit-board layout.
Each device consists of two 16-bit shift registers, 32 latches, 32 OR gates, and 32 pnp open-
collector output AND gates. Typically, a 32-bit data string is split into two 16-bit data strings externally and then entered in parallel into the shift registers on the high-to-low transition of the clock signal. A high LATCH ENABLE transfers the data from the shift registers to the inputs of 32 OR gates through the latches. Data present in the latch during the high-to-low transition of LATCH ENABLE is stored. When STROBE is high, the latch is masked and a high is placed on the data input of the output AND gates. When STROBE is low and SUSTAIN is high, data from the latches is reflected at the outputs. When low, SUSTAIN forces all outputs to their off state. Drivers can be cascaded via the serial data outputs of the static shift registers. These outputs are not affected by LATCH ENABLE, STROBE, or SUSTAIN.




Laura Gentili
Italy
Local time: 02:57
Native speaker of: Native in ItalianItalian
PRO pts in pair: 49

Peer comments on this answer (and responses from the answerer)
Heathcliff
agree  Tony M
2471 days
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