Glossary entry (derived from question below)
English term or phrase:
pull-down resistor
Chinese translation:
下拉电阻(器)
Mar 15, 2010 16:54
14 yrs ago
English term
pull-down resistor
GBK
English to Chinese
Tech/Engineering
Electronics / Elect Eng
Definition from
Sealevel Systems, Inc.:
A resistor used to pull a logic input "down" to the low state, or logic-0 state, thus preventing a disconnected input from floating into an undetermined state.
Example sentences:
If the pull-down resistor is not there, the bridge chip could think that the attached device is a master when it is a slave or could think that it is a slave when it is really a master. Because of this you should be safe and add the pull-down resistor. (Cypress Semiconductor Corporation)
If your PIC's pins are set to INPUT, they will be floating (high impedance). In that case, you would still need pull-up or pull-down resistors for an external CMOS device that was getting input from that pin of the PIC. (All About Circuits)
These USB devices have a default power-up state of logic high, because they have an internal pull-up resistor. Attaching an external pull-down resistor will note yield a logic low start up state. (National Instruments Corporation)
Change log
Mar 15, 2010 16:35: changed "Kudoz queue" from "In queue" to "Public"
Mar 15, 2010 16:54: changed "Stage" from "Preparation" to "Submission"
Mar 18, 2010 17:54: changed "Stage" from "Submission" to "Selection"
Mar 25, 2010 19:54: changed "Stage" from "Selection" to "Completion"
Proposed translations
+2
1 day 21 hrs
Selected
下拉电阻(器)
Definition from
eet-cn:
1、当TTL电路驱动COMS电路时，如果TTL电路输出的高电平低于COMS电路的最低高电平（一般为3.5V）， 这时就需要在TTL的输出端接上拉电阻，以提高输出高电平的值。<br />2、OC门电路必须加上拉电阻，以提高输出的搞电平值。<br />3、为加大输出引脚的驱动能力，有的单片机管脚上也常使用上拉电阻。<br />4、在COMS芯片上，为了防止静电造成损坏，不用的管脚不能悬空，一般接上拉电阻产生降低输入阻抗， 提供泄荷通路。<br />5、芯片的管脚加上拉电阻来提高输出电平，从而提高芯片输入信号的噪声容限增强抗干扰能力。<br />6、提高总线的抗电磁干扰能力。管脚悬空就比较容易接受外界的电磁干扰。<br />7、长线传输中电阻不匹配容易引起反射波干扰，加上下拉电阻是电阻匹配，有效的抑制反射波干扰。<br />上拉电阻阻值的选择原则包括:<br />1、从节约功耗及芯片的灌电流能力考虑应当足够大；电阻大，电流小。<br />2、从确保足够的驱动电流考虑应当足够小；电阻小，电流大。<br />3、对于高速电路，过大的上拉电阻可能边沿变平缓。综合考虑<br />以上三点,通常在1k到10k之间选取。对下拉电阻也有类似道理
Example sentences:
正确的选择方法是: 先了解需要上拉或下拉的元器件端口需要的上拉或下拉电流, 然后参考系统的供电电压, 计算上拉或下拉电阻, 确保上拉或下拉电阻能够提供所需要的电流，基本上，100K作为普通的数字端口的上拉或下拉电阻是一个比较常用的值。 (eet-cn)
4 KudoZ points awarded for this answer.
Something went wrong...