GLOSSARY ENTRY (DERIVED FROM QUESTION BELOW) | ||||||
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18:40 Apr 6, 2004 |
English to French translations [PRO] Tech/Engineering - Electronics / Elect Eng / cable testing | |||||||
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| Selected response from: Didier Fourcot Local time: 21:22 | ||||||
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Summary of answers provided | ||||
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3 +1 | clavettes |
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4 | pilotées |
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clavettes Explanation: Driven Pin (see the link) is here-below translated as "Clavette". (not an expert however the process with the "clavettes" seems to be used for mapping a special type of pins, the core IO pins, translated as "goupilles"): Constraint Driven Pin Mapping for Concurrent SOC Testing p. 511 Constraint Driven Pin Mapping for Concurrent SOC Testing. PDF. ... A solution for mapping core I/O pins to System-On-a-Chip (SOC) I/O pins in order to ... csdl.computer.org/comp/proceedings/ vlsid/2002/1441/00/14410511abs.htm - 11k - Translation in French: "p.511 Clavette de contrainte (driven pin) traçant pour l'essai concourant de SOC: une solution pour tracer des goupilles (core IO pins), etc..... csdl.computer.org/comp/proceedings/ vlsid/2002/1441/00/14410511abs.htm - 11k - |
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pilotées Explanation: Les Pins sont très probablement des broches d'une prise. Sur une prise RJ-45 par exemple, 4 broches sur les 8 sont nécessaires en 10BT, mais il en faut 8 en 100BT, et elles n'ont pas les mêmes affectations en câblage TIA 568B ou 568A; un testeur intelligent pilote donc ertaines broches pour un type d'essai et éventuellement d'autre pour un autre type. Pour un testeur RS-232 les combinaisons de broches à piloter sont très nombreuses, voir références ci-dessous. Reference: http://www.mbelectronique.fr/html/faq/verification_des_cable... Reference: http://www.gmc-instruments.com/resources/p1/profi204/db_f.pd... |
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