English to Spanish Tech/Engineering Computers: Hardware CPU operation.

Q word below between **__**. Please refer to my prior questions last night and this morning... Thank you very much!

"The Timer1 module is a 16-bit timer which can serve as the time counter for the real-time clock, or operate as a free-running interval timer/counter. The 16-bit timer has the following modes:
• 16-bit Timer
• 16-bit Synchronous Counter
• 16-bit Asynchronous Counter
Further, the following operational characteristics are supported:
• Timer gate operation
• Selectable prescaler settings
• Timer operation during CPU Idle and Sleep modes
• Interrupt on 16-bit period register match or **falling edge** of external gate signal

These operating modes are determined by setting the appropriate bit(s) in the 16-bit SFR, T1CON. Figure 9-1 presents a block diagram of the 16-bit timer module.
16-bit Timer Mode: In the 16-bit Timer mode, the timer increments on every instruction cycle up to a match value, preloaded into the Period register PR1, then resets to ‘0’ and continues to count.
When the CPU goes into the Idle mode, the timer will stop incrementing, unless the TSIDL (T1CON) bit = 0. If TSIDL = 1, the timer module logic will resume
the incrementing sequence upon termination of the CPU Idle mode."